PCI9054-AB50PI

Product Summary

The PCI9054-AB50PI is a PCI Bus Master I/O Accelerator Chip. It offers a variety of technological advances and features designed to simplify complex telecom, networking and I/O adapter embedded designs. The PCI9054-AB50PI is an ideal solution for high performance Motorola MPC 850/860 PowerQUICC designs, CompactPCI Hot Swap adapters, PCI bus master adapters, and embedded host designs. The PCI9054-AB50PI provides an advanced Data Pipe ArchitectureTM with two DMA engines, an enhanced direct-connect interface to the MPC 850/860, a 50MHz Local bus, and an industrial temperature range 225-ball PBGA.

Parametrics

PCI9054-AB50PI absolute maximum ratings: (1)Storage Temperature:-55℃ to +125℃; (2)Ambient Temperature with Power Applied:-40℃ to +85℃; (3)Supply Voltage to Ground:-0.5V to +4.6V; (4)Input Voltage (VIN):VSS -0.5V to 5.5V; (5)Output Voltage (VOUT):VSS -0.5V to VDD +0.5; (6)Maximum Package Power Dissipation (176-Pin PQFP):1.0W.

Features

PCI9054-AB50PI features: (1)PCI v2.2 Power Management Spec compatible ; (2)PCI v2.2 Vital Product Data(VPD) configuration support; (3)PCI Dual Address Cycle (DAC) support; (4)Programmable Interrupt Generator; (5)Programmable Burst Management; (6)Supports Type 0 and Type 1 Configuration Cycles; (7)Supports Local Bus Direct-Connect to MPC 850/860 PowerQUICC, Intel i960, and IBM PPC 401 CPUs and similar bus protocol devices; (8)3.3V, 5V Tolerant PCI signaling supports Universal PCI Adapter designs; (9)Flexible 3.3V, 5V Tolerant Local Bus operation up to 50MHz; (10)32-Bit Multiplexed, or Non-Multiplexed Local Bus Supports 8-, 16-, and 32-Bit Peripheral and Memory devices; (11)CompactPCI Hot Swap Friendly; (12)I2O v1.5 Ready Messaging Unit; (13)Industrial Temp Range Operation; (14)3.3V CMOS in 176-pin PQFP or 225-ball PBGA packages; (15)PCI v2.2 compliant 32-bit 33MHz Bus Master Interface Controller enables PCI Burst Transfers up to 132Mbytes/second; (16)General Purpose Bus Master Interface featuring an advanced Data Pipe Architecture which includes two DMA engines, programmable Target and Initiator data transfer modes and PCI messaging functions.

Diagrams