S5935QF

Product Summary

Applied Micro Circuits Corporation (AMCC), the premier supplier of single chip solutions, has developed the S5935QF to solve the problem of interfacing applications to the PCI Local bus while offering support for newer PCI chipsets and operating systems. The S5935QF is a powerful and flexible PCI controller supporting several levels of interface sophistication. At the lowest level, it can serve simply as a PCI bus Target with modest transfer requirements. For high-performance applications, the S5935QF can become a Bus Master to attain the PCI Local bus peak transfer capability of 132 MBytes/sec. The S5935QF PCI controller also maintains drop-in compatibility for upgrading many existent S5933 designs requiring migration into new motherboard architectures, PCI BIOSs and software operating systems. The S5935QF is an off-the-shelf, low-cost, standard product, which is PCI 2.1 compliant. And, since AMCC is a member of the PCI Special Interest Group, the S5935QF has been tested on various manufacturer’s PCI motherboards, chip sets, PCI BIOSs and operating systems. This removes the burden of compliance and compatibility testing from the designer and thus significantly reduces development time. Utilizing the S5935QF allows the designer to focus on the actual application, not debugging the PCI interface.

Parametrics

S5935QF absolute maximum ratings: (1)Storage Temperature: -55 to 125 ℃; (2)Supply Voltage (VCC): -0.3 to 7.0 Volts; (3)Input Pin Voltage: -0.5 to VCC+5.0 Volts; (4)Power Dissipation: 1.05 Watts @ 33 MHz.

Features

S5935QF features: (1)PCI 2.1 Compliant Master/Slave Device; (2)Full 132 Mbytes/sec Transfer Rate; (3)Supports new Intel 440BX/GX Chipsets; (4)Supports new WinNT Service Pack 2 & 3; (5)PCI Bus Operation DC to 33 MHz; (6)8/16/32 Bit Add-On User Bus; (7)Four Definable Pass-Thru Data Channels; (8)Two 32 Byte Internal FIFOs w/DMA; (9)Synchronous Add-On Bus Operation; (10)Mail Box Registers w/Byte Level Status; (11)Direct Mail Box Data Strobe/Interrupts; (12)Direct PCI & Add-On Interrupt Pins; (13)Optional Non-Volatile Memory Boot Loading; (14)Optional Expansion BIOS/POST Code.

Diagrams