(Hong Kong)
Product Summary
The EP1C12F324C8N contains a two-dimensional row- and column-based architecture to implement custom logic. Column and row interconnects of varying speeds provide signal interconnects between LABs and embedded memory blocks. The logic array consists of LABs, with 10 LEs in each LAB. An LE is a small unit of logic providing efficient implementation of user logic functions. LABs are grouped into rows and columns across the EP1C12F324C8N. Cyclone devices range between 2,910 to 20,060 LEs.
Parametrics
EP1C12F324C8N absolute maximum ratings: (1)VCCINT Supply voltage With respect to ground: -0.5 to 2.4 V; (2)VCCIO: -0.5 to 4.6 V; (3)VI DC input voltage: -0.5 to 4.6 V; (4)IOUT DC output current, per pin: -25 25 mA; (5)TSTG Storage temperature No bias: -65 to 150 ℃; (6)TAMB Ambient temperature Under bias: -65 to 135 ℃; (7)TJ Junction temperature BGA packages under bias: 135 ℃.
Features
EP1C12F324C8N features: (1)2,910 to 20,060 LEs; (2)Up to 294,912 RAM bits (36,864 bytes); (3)Supports configuration through low-cost serial configuration device; (4)Support for LVTTL, LVCMOS, SSTL-2, and SSTL-3 I/O standards; (5)Support for 66-MHz, 32-bit PCI standard; (6)Low speed (311 Mbps) LVDS I/O support; (7)Up to two PLLs per device provide clock multiplication and phase shifting; (8)Up to eight global clock lines with six clock resources available per logic array block (LAB) row; (9)Support for external memory, including DDR SDRAM (133 MHz), FCRAM, and single data rate (SDR) SDRAM; (10)Support for multiple intellectual property (IP) cores, including Altera. MegaCore. functions and Altera Megafunctions Partners Program (AMPPSM) megafunctions.
Diagrams
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 EP1C12F324C8N |
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IC CYCLONE FPGA 12K LE 324-FBGA |
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EP1C12 |
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EP1C12F256C6 |
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IC CYCLONE FPGA 12K LE 256-FBGA |
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EP1C12F256C6N |
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IC CYCLONE FPGA 12K LE 256-FBGA |
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EP1C12F256C7 |
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IC CYCLONE FPGA 12K LE 256-FBGA |
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EP1C12F256C7N |
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IC CYCLONE FPGA 12K LE 256-FBGA |
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EP1C12F256C8 |
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IC CYCLONE FPGA 12K LE 256-FBGA |
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