SAF-XE167F-48F66L

Product Summary

The SAF-XE167F-48F66L real time signal controller is a part of the Infineon Family of full-feature single-chip CMOS microcontrollers. The SAF-XE167F-48F66L extends the functionality and performance of the C166 Family in terms of instructions (MAC unit), peripherals, and speed. They combine high CPU performance (up to 80 million instructions per second) with extended peripheral functionality and enhanced IO capabilities. Optimized peripherals can be adapted flexibly to meet the application requirements. The SAF-XE167F-48F66L utilizes clock generation via PLL and internal or external clock sources. Onchip memory modules include program Flash, program RAM, and data RAM.

Parametrics

SAF-XE167F-48F66L absolute maximum ratings: (1)Storage temperature TST: -65 to 150 ℃; (2)Junction temperature TJ: -40 to 125 ℃ under bias; (3)Voltage on VDDI pins with respect to ground (VSS), VDDIM,; (4)VDDI1: -0.5 to 1.65 V; (5)Voltage on VDDP pins with respect to ground (VSS) VDDPA,; (6)VDDPB: -0.5 – 6.0 V; (7)Voltage on any pin with respect to ground (VSS) VIN: -0.5 to VDDP+ 0.5 V VIN < VDDPmax; (8)Input current on any pin during overload condition: -10 to 10 mA; (9)Absolute sum of all input currents during overload condition: 100 mA; (10)Output current on any pin IOH, IOL: 30 mA.

Features

SAF-XE167F-48F66L features: (1)One-cycle 32-bit addition and subtraction with 40-bit result; (2)One-cycle multiplication (16 × 16 bit); (3)Background division (32 / 16 bit) in 21 cycles; (4)One-cycle multiply-and-accumulate (MAC) instructions; (5)Enhanced Boolean bit manipulation facilities; (6)Zero-cycle jump execution; (7)Additional instructions to support HLL and operating systems; (8)Register-based design with multiple variable register banks; (9)Fast context switching support with two additional local register banks: 16 Mbytes total linear address space for code and data; 1024 Bytes on-chip special function register area (C166 Family compatible); (10)Single power supply from 3.0 V to 5.5 V; (11)Programmable watchdog timer and oscillator watchdog; (12)Up to 118 general purpose I/O lines; (13)On-chip bootstrap loaders; (14)Supported by a full range of development tools including C compilers, macroassembler packages, emulators, evaluation boards, HLL debuggers, simulators, logic analyzer disassemblers, programming boards; (15)On-chip debug support via JTAG interface; (16)144-pin Green LQFP package, 0.5 mm (19.7 mil) pitch

Diagrams